SMASH Vision
Mixed-Signal Multi-Level & Multi-Domain Simulation
Missing EDA Links University Program
A specific approach for universities
Give your students the opportunity to get acquainted with state-of-the-art mixed-signal design solutions!
Thanks to Dolphin Integration EDA solutions, enjoy getting acquainted with the intricacies of logic, analog and mixed-signal modeling enabled by multi-language simulation!
State-of-the-art analog and mixed-signal design requires analysis capabilities allowing to automate and secure multiple design steps while simplifying the investigation and debug of mixed-language designs. While the circuit browser gives direct access to instances and models in the netlist, error and warning messages issued by SMASH now contain clickable file and line number information for efficient debugging.
SMASH 5.16 delivers new analyses dedicated to analog design, along with Verilog/Verilog-A behavioral improvements both for logic testbenches and for analog modeling.Key enhancements
Increased analog design productivity with linear loop stability (.LSTB) and data sampling noise (.SAMPLE) analyses
Improved compliance with Verilog standards for testbench descriptions
Increased Verilog-A simulation performance including support of analog functions for behavioral modeling
Extended HSPICE compliance with the support of .ALTER and .DEL LIB directives
Enhanced debugging capabilities with direct access to analog ports in the “circuit” pane
Improved device analysis capabilities with interactive editing of SPICE device parameters and drawing of device characteristics
Description of the benefits
Verilog compliance enhancements target testbench descriptions with access to signals and variables using hierarchical names and system tasks for file access in read mode.
Verilog-A improvements include additional capabilities for behavioral modeling, with user defined analog functions and string parameters for modules, as well as increased simulation performance, more specifically for Compact Models.
Error, warning and information messages issued during the parsing of SPICE descriptions have been significantly enhanced in order to provide the designer with more easily exploitable messages with explicit file and line number information. The file and line number in the message is interpreted by SMASH as an active link which allows to quickly locate the origin of problems simply by clicking on the link in the report.
The “circuit” browser has been extended to provide quick access to the source level description of instances and models directly from the user interface of SMASH.
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Don’t miss out discovering the new “ICD – Interactive Curve Display” solution for waveform viewing.